Status of EVL ports

The EVL project primarily tracks the mainline Linux kernel. In absence of any specific information, all kernel releases mentioned below refer to mainline Linux.

To get EVL running on a platform, we need the following software to be ported in the following sequence:

  1. the Dovetail interface. This task is composed of two incremental milestones: first getting the interrupt pipeline to work, then enabling the alternate scheduling. Porting Dovetail is where most of the work takes place, the other porting tasks are comparatively quite simple.

  2. the EVL core which is mostly composed of architecture-independent code, therefore only a few bits need to be ported (a FPU test helper for the most part).

  3. the EVL library. Likewise, this code has very little dependencies on the underlying CPU architecture and platform. A port boils down to resolving the address of the clock_gettime(3) in the vDSO.

The table below summarizes the current status of the EVL ports to particular SoCs which we are aware of. If you are interested in porting your own autonomous core to a particular kernel release Dovetail supports, you certainly need the IRQ pipeline column matching the target platform to be checked, and likely the Alternate scheduling column as well. Running the EVL core requires both features to be available. If you ported EVL to a SoC which does not appear in this list and want to let people know about it, please drop me a note at rpm@xenomai.org.

Current target kernel release

Linux 5.5

ARM64 SoC

SoC (Board) IRQ pipeline1 Alternate scheduling EVL base2 EVL stress3 Test kernel
Qualcomm QCS404 5.1-rc3
Qualcomm DragonBoard 410c 5.0
Broadcom BCM2837 (Raspberry 3 Model B) 5.5
Broadcom BCM2711 (Raspberry PI 4 Model B) 5.5
HiSilicon Kirin 620 (HiKey LeMaker) 5.5-rc7
Xilinx Zynq UltraScale+ (ZCU102) 5.2
NXP i.MX8M Mini (Variscite DART-MX8M-MINI) 5.2 *
QEMU virt 5.5

* Mainline kernel with SoC-specific bits picked from the vendor tree.

ARM SoC

SoC (Board) IRQ pipeline1 Alternate scheduling EVL base2 EVL stress3 Test kernel
NXP i.MX7D (SabreSD) 5.2
NXP i.MX6qp (SabreSD) 5.5
TI AM335x-GP (BeagleBone Black) 5.1-rc3
Altera Cyclone V SoC FPGA (DevKit) 5.5
STMicro Cannes2-STiH410 (B2260) 5.2-rc7
Broadcom BCM2636 (Raspberry PI 2 Model B) 5.5
AllWinner H3 (NanoPI NEO) 5.5-rc2

X86_64

Chipset (Module) IRQ pipeline1 Alternate scheduling EVL base2 EVL stress3 Test kernel
QEMU KVM 5.5
Intel Atom x5-E3940 (TQMxE39M) 5.5
Intel C236 core i7 quad (DFI SD631) 5.5-rc7
Intel Desktop Board DQ45CB 5.5-rc7


1 Means that the pipeline torture tests pass (see CONFIG_IRQ_PIPELINE_TORTURE_TEST). This milestone guarantees that we can deliver high-priority interrupt events immediately to a guest core, regardless of the work ongoing for the main kernel.

2 When this box is checked, EVL’s basic functional test suite runs properly on the platform, which is a good starting point. So far so good.

3 When this box is checked, the EVL core passes a massive stress test involving the hectic and latmus applications running in parallel along with the full test suite for 24 hrs, all glitchlessly. This denotes a reliable state, including flawless alternate scheduling of threads between the main kernel and EVL. On the contrary, a problem with sharing the FPU unit properly between the in-band and out-of-band execution contexts is most often the reason for keeping this box unchecked until the situation is fixed.


Last modified: Sat, 15 Feb 2020 20:00:28 CET